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author | David Gibson | 2017-12-11 03:10:44 +0100 |
---|---|---|
committer | David Gibson | 2018-01-16 23:35:24 +0100 |
commit | ee76a09fc72cfbfab2bb5529320ef7e460adffd8 (patch) | |
tree | 1a0c7f1f0961790a8e28fc19a6d22ced10d71c73 /include/hw | |
parent | spapr: Capabilities infrastructure (diff) | |
download | qemu-ee76a09fc72cfbfab2bb5529320ef7e460adffd8.tar.gz qemu-ee76a09fc72cfbfab2bb5529320ef7e460adffd8.tar.xz qemu-ee76a09fc72cfbfab2bb5529320ef7e460adffd8.zip |
spapr: Treat Hardware Transactional Memory (HTM) as an optional capability
This adds an spapr capability bit for Hardware Transactional Memory. It is
enabled by default for pseries-2.11 and earlier machine types. with POWER8
or later CPUs (as it must be, since earlier qemu versions would implicitly
allow it). However it is disabled by default for the latest pseries-2.12
machine type.
This means that with the latest machine type, HTM will not be available,
regardless of CPU, unless it is explicitly enabled on the command line.
That change is made on the basis that:
* This way running with -M pseries,accel=tcg will start with whatever cpu
and will provide the same guest visible model as with accel=kvm.
- More specifically, this means existing make check tests don't have
to be modified to use cap-htm=off in order to run with TCG
* We hope to add a new "HTM without suspend" feature in the not too
distant future which could work on both POWER8 and POWER9 cpus, and
could be enabled by default.
* Best guesses suggest that future POWER cpus may well only support the
HTM-without-suspend model, not the (frankly, horribly overcomplicated)
POWER8 style HTM with suspend.
* Anecdotal evidence suggests problems with HTM being enabled when it
wasn't wanted are more common than being missing when it was.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'include/hw')
-rw-r--r-- | include/hw/ppc/spapr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5569caf1d4..dc64f4ebcb 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,6 +54,9 @@ typedef enum { * Capabilities */ +/* Hardware Transactional Memory */ +#define SPAPR_CAP_HTM 0x0000000000000001ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; |