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| author | Cédric Le Goater | 2019-11-19 15:12:06 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-12-16 11:46:34 +0100 |
| commit | f286f04c21aba0f751ede4f5c99228a09e40c90b (patch) | |
| tree | cd983ee1c2135a3103b95d31759be1ccce693dd1 /include/hw | |
| parent | aspeed/smc: Do not map disabled segment on the AST2600 (diff) | |
| download | qemu-f286f04c21aba0f751ede4f5c99228a09e40c90b.tar.gz qemu-f286f04c21aba0f751ede4f5c99228a09e40c90b.tar.xz qemu-f286f04c21aba0f751ede4f5c99228a09e40c90b.zip | |
aspeed/smc: Add AST2600 timings registers
Each CS has its own Read Timing Compensation Register on newer SoCs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20191119141211.25716-13-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/ssi/aspeed_smc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 684d16e336..6fbbb238f1 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -40,6 +40,7 @@ typedef struct AspeedSMCController { uint8_t r_ce_ctrl; uint8_t r_ctrl0; uint8_t r_timings; + uint8_t nregs_timings; uint8_t conf_enable_w0; uint8_t max_slaves; const AspeedSegments *segments; |