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authorJoseph Myers2017-08-08 02:43:38 +0200
committerPaolo Bonzini2017-08-08 10:40:20 +0200
commitab6ab3e9972a49a359f59895a88bed311472ca97 (patch)
tree78e5a615953f63121bc978f5914457787d136d6b /include/qemu-common.h
parentscsi: clarify sense codes for LUN0 emulation (diff)
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target/i386: set rip_offset for some SSE4.1 instructions
When emulating various SSE4.1 instructions such as pinsrd, the address of a memory operand is computed without allowing for the 8-bit immediate operand located after the memory operand, meaning that the memory operand uses the wrong address in the case where it is rip-relative. This patch adds the required rip_offset setting for those instructions, so fixing some GCC test failures (13 in the gcc testsuite in my GCC 6-based testing) when testing with a default CPU setting enabling those instructions. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708080041391.28702@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'include/qemu-common.h')
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