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| author | Vitaly Kuznetsov | 2022-02-21 15:53:15 +0100 |
|---|---|---|
| committer | Paolo Bonzini | 2022-03-15 11:50:50 +0100 |
| commit | 12cab535db6440af41ed8dfefe908a594321b6ce (patch) | |
| tree | 523ba4bdcd706950786b5c54568731062dd6c10b /include/qemu/transactions.h | |
| parent | x86: Support XFD and AMX xsave data migration (diff) | |
| download | qemu-12cab535db6440af41ed8dfefe908a594321b6ce.tar.gz qemu-12cab535db6440af41ed8dfefe908a594321b6ce.tar.xz qemu-12cab535db6440af41ed8dfefe908a594321b6ce.zip | |
i386: Add Icelake-Server-v6 CPU model with 5-level EPT support
Windows 11 with WSL2 enabled (Hyper-V) fails to boot with Icelake-Server
{-v5} CPU model but boots well with '-cpu host'. Apparently, it expects
5-level paging and 5-level EPT support to come in pair but QEMU's
Icelake-Server CPU model lacks the later. Introduce 'Icelake-Server-v6'
CPU model with 'vmx-page-walk-5' enabled by default.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220221145316.576138-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'include/qemu/transactions.h')
0 files changed, 0 insertions, 0 deletions