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authorBALATON Zoltan2022-09-24 14:28:00 +0200
committerDaniel Henrique Barboza2022-10-17 21:15:09 +0200
commit03f7041bfdc45f6c981a83fd2d932bad161769ad (patch)
tree0a710980b8cf4a95ef2a1c86d6ea55a9e216cb93 /include
parentppc440_sdram: Implement enable bit in the DDR2 SDRAM controller (diff)
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ppc440_sdram: Get rid of the init RAM hack
Remove the do_init parameter of ppc440_sdram_init and enable SDRAM controller from the board. Firmware does this so it may only be needed when booting with -kernel without firmware but we enable SDRAM unconditionally to preserve previous behaviour. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <c2eda8f83c82f655aa7821a5a8c9310484bd6a1d.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ppc/ppc4xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 558500fb97..78a845399e 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -37,6 +37,8 @@ typedef struct {
uint32_t bcr;
} Ppc4xxSdramBank;
+void ppc440_sdram_enable(CPUPPCState *env);
+
void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
Ppc4xxSdramBank ram_banks[],
const ram_addr_t sdram_bank_sizes[]);