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| author | Richard Henderson | 2022-08-06 19:04:44 +0200 |
|---|---|---|
| committer | Richard Henderson | 2022-08-09 04:42:53 +0200 |
| commit | 10dcb08b03863221faa41f4f1aa835cdca441b96 (patch) | |
| tree | c4945ccad293e7454842baeea9d57749c8561164 /include | |
| parent | Merge tag 'mips-20220809' of https://github.com/philmd/qemu into staging (diff) | |
| download | qemu-10dcb08b03863221faa41f4f1aa835cdca441b96.tar.gz qemu-10dcb08b03863221faa41f4f1aa835cdca441b96.tar.xz qemu-10dcb08b03863221faa41f4f1aa835cdca441b96.zip | |
target/loongarch: Remove cpu_fcsr0
All of the fpu operations are defined with TCG_CALL_NO_WG, but they
all modify FCSR0. The most efficient way to fix this is to remove
cpu_fcsr0, and instead use explicit load and store operations for the
two instructions that manipulate that value.
Acked-by: Qi Hu <huqi@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reported-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions