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| author | Daniel Henrique Barboza | 2022-06-24 10:49:12 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza | 2022-08-31 19:08:05 +0200 |
| commit | 1f5d6b2ad14df9daad17e81d9e247bd1fd2fd5fc (patch) | |
| tree | 7d860a15b1a2225afc55e37dfa7aac26f6d88dcd /include | |
| parent | ppc/pnv: add PnvPHB base/proxy device (diff) | |
| download | qemu-1f5d6b2ad14df9daad17e81d9e247bd1fd2fd5fc.tar.gz qemu-1f5d6b2ad14df9daad17e81d9e247bd1fd2fd5fc.tar.xz qemu-1f5d6b2ad14df9daad17e81d9e247bd1fd2fd5fc.zip | |
ppc/pnv: turn PnvPHB3 into a PnvPHB backend
We need a handful of changes that needs to be done in a single swoop to
turn PnvPHB3 into a PnvPHB backend.
In the PnvPHB3, since the PnvPHB device implements PCIExpressHost and
will hold the PCI bus, change PnvPHB3 parent to TYPE_DEVICE. There are a
couple of instances in pnv_phb3.c that needs to access the PCI bus, so a
phb_base pointer is added to allow access to the parent PnvPHB. The
PnvPHB3 root port will now be connected to a PnvPHB object.
In pnv.c, the powernv8 machine chip8 will now hold an array of PnvPHB
objects. pnv_get_phb3_child() needs to be adapted to return the PnvPHB3
backend from the PnvPHB child. A global property is added in
pnv_machine_power8_class_init() to ensure that all PnvPHBs are created
with phb->version = 3.
After all these changes we're still able to boot a powernv8 machine with
default settings. The real gain will come with user created PnvPHB
devices, coming up next.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-4-danielhb413@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci-host/pnv_phb3.h | 5 | ||||
| -rw-r--r-- | include/hw/ppc/pnv.h | 3 |
2 files changed, 6 insertions, 2 deletions
diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 1375f18fc1..3b9ff1096a 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -14,6 +14,7 @@ #include "hw/pci/pcie_port.h" #include "hw/ppc/xics.h" #include "qom/object.h" +#include "hw/pci-host/pnv_phb.h" typedef struct PnvPHB3 PnvPHB3; typedef struct PnvChip PnvChip; @@ -127,7 +128,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3, PNV_PHB3) #define PCI_MMIO_TOTAL_SIZE (0x1ull << 60) struct PnvPHB3 { - PCIExpressHost parent_obj; + DeviceState parent; + + PnvPHB *phb_base; uint32_t chip_id; uint32_t phb_id; diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 37c303bf36..21fa90aaff 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -33,6 +33,7 @@ #include "hw/ppc/pnv_core.h" #include "hw/pci-host/pnv_phb3.h" #include "hw/pci-host/pnv_phb4.h" +#include "hw/pci-host/pnv_phb.h" #include "qom/object.h" #define TYPE_PNV_CHIP "pnv-chip" @@ -81,7 +82,7 @@ struct Pnv8Chip { PnvHomer homer; #define PNV8_CHIP_PHB3_MAX 4 - PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; + PnvPHB phbs[PNV8_CHIP_PHB3_MAX]; uint32_t num_phbs; XICSFabric *xics; |