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authorMax Filippov2014-09-18 06:13:09 +0200
committerMax Filippov2014-11-02 22:51:43 +0100
commit20303e42d4726018ee64798b4d3051cbe6eea9f8 (patch)
tree2fad250b25d4cae8f80c7f7ccea72afad31c60bb /include
parenttarget-xtensa: add definition for XTHAL_INTTYPE_PROFILING (diff)
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target-xtensa: tests: pre-process tests linker script
Xtensa cores have configurable interrupt vectors and endiannes. This information is needed to link executable images correctly for a specific core configuration. Instead of hard-coding dc232 defaults pull endianness, number of high-priority interrupts and location of vectors from the core configuration and pass it through the C preprocessor. While at it clean up tabs and align the initial stack on 16 bytes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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