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| author | Peter Maydell | 2014-03-18 15:31:42 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-03-18 15:31:42 +0100 |
| commit | 2dda43bacc79f8e283702614745cd700c637de64 (patch) | |
| tree | 091425c65ad18714e967d6376cada6a6a6ae9db6 /include | |
| parent | Merge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-20140317' int... (diff) | |
| parent | scripts/qemu-binfmt-conf.sh: Add AArch64 registration (diff) | |
| download | qemu-2dda43bacc79f8e283702614745cd700c637de64.tar.gz qemu-2dda43bacc79f8e283702614745cd700c637de64.tar.xz qemu-2dda43bacc79f8e283702614745cd700c637de64.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140317' into staging
target-arm queue:
* more A64 Neon instructions
* fixes to reset CBAR values for A9 and A15 boards
* fix accesses to PMCR register in -icount mode
# gpg: Signature made Mon 17 Mar 2014 22:04:52 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140317: (30 commits)
scripts/qemu-binfmt-conf.sh: Add AArch64 registration
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
target-arm: A64: Implement FCVTXN
target-arm: A64: Implement scalar saturating narrow ops
target-arm: A64: Move handle_2misc_narrow function
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
softfloat: export squash_input_denormal functions
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder
target-arm: A64: Implement FRINT*
target-arm: A64: Implement SRI
target-arm: A64: Add FRECPX (reciprocal exponent)
target-arm: A64: List unsupported shift-imm opcodes
target-arm: A64: Implement FCVTL
target-arm: A64: Implement FCVTN
target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
target-arm: A64: Implement SHLL, SHLL2
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
target-arm: A64: Saturating and narrowing shift ops
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/exec/exec-all.h | 2 | ||||
| -rw-r--r-- | include/fpu/softfloat.h | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 502b7aa084..f9ac332f9d 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -44,7 +44,7 @@ struct TranslationBlock; typedef struct TranslationBlock TranslationBlock; /* XXX: make safe guess about sizes */ -#define MAX_OP_PER_INSTR 208 +#define MAX_OP_PER_INSTR 266 #if HOST_LONG_BITS == 32 #define MAX_OPC_PARAM_PER_ARG 2 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 4b4df88527..db878c1313 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -245,6 +245,13 @@ INLINE flag get_default_nan_mode(float_status *status) void float_raise( int8 flags STATUS_PARAM); /*---------------------------------------------------------------------------- +| If `a' is denormal and we are in flush-to-zero mode then set the +| input-denormal exception and return zero. Otherwise just return the value. +*----------------------------------------------------------------------------*/ +float32 float32_squash_input_denormal(float32 a STATUS_PARAM); +float64 float64_squash_input_denormal(float64 a STATUS_PARAM); + +/*---------------------------------------------------------------------------- | Options to indicate which negations to perform in float*_muladd() | Using these differs from negating an input or output before calling | the muladd function in that this means that a NaN doesn't have its |