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| author | Bastian Koppelmann | 2014-11-02 18:31:45 +0100 |
|---|---|---|
| committer | Bastian Koppelmann | 2014-12-10 12:13:45 +0100 |
| commit | 328f1f0f08f1aa303eef7493bd7c3d97a8d9636a (patch) | |
| tree | d2d5238b4218b09e733a336610f5e48fef8aec77 /include | |
| parent | target-tricore: Add instructions of RLC opcode format (diff) | |
| download | qemu-328f1f0f08f1aa303eef7493bd7c3d97a8d9636a.tar.gz qemu-328f1f0f08f1aa303eef7493bd7c3d97a8d9636a.tar.xz qemu-328f1f0f08f1aa303eef7493bd7c3d97a8d9636a.zip | |
target-tricore: Add instructions of RCR opcode format
Add instructions of RCR opcode format.
Add helper for madd32/64_ssov and madd32/64_suov.
Add helper for msub32/64_ssov and msub32/64_suov.
Add microcode generator function madd/msub for 32bit and 64bit, which calculate a mul and a add/sub.
OPC2_32_RCR_MSUB_U_32 -> OPC2_32_RCR_MSUB_U_32.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include')
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