summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorPeter Maydell2019-02-01 15:55:41 +0100
committerPeter Maydell2019-02-01 15:55:41 +0100
commit3693f217d38f053fa5a7fcd2841c07926c026218 (patch)
tree6b871f3400bc5ca86da8931abc95035424a63b5d /include
parenthw/arm/nrf51_soc: set object owner in memory_region_init_ram (diff)
downloadqemu-3693f217d38f053fa5a7fcd2841c07926c026218.tar.gz
qemu-3693f217d38f053fa5a7fcd2841c07926c026218.tar.xz
qemu-3693f217d38f053fa5a7fcd2841c07926c026218.zip
armv7m: Don't assume the NVIC's CPU is CPU 0
Currently the ARMv7M NVIC object's realize method assumes that the CPU the NVIC is attached to is CPU 0, because it thinks there can only ever be one CPU in the system. To allow a dual-Cortex-M33 setup we need to remove this assumption; instead the armv7m wrapper object tells the NVIC its CPU, in the same way that it already tells the CPU what the NVIC is. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-2-peter.maydell@linaro.org
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions