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| author | Mateja Marjanovic | 2019-02-26 13:23:12 +0100 |
|---|---|---|
| committer | Aleksandar Markovic | 2019-02-27 14:26:14 +0100 |
| commit | 37b9aae2e6e005e6df206a0b4804972460806166 (patch) | |
| tree | c5d4f110b375bf091d26bbb11595132138fda2d9 /include | |
| parent | tests/tcg: target/mips: Add tests for MSA integer max/min instructions (diff) | |
| download | qemu-37b9aae2e6e005e6df206a0b4804972460806166.tar.gz qemu-37b9aae2e6e005e6df206a0b4804972460806166.tar.xz qemu-37b9aae2e6e005e6df206a0b4804972460806166.zip | |
target/mips: Preparing for adding MMI instructions
Set up MMI code to be compiled only for TARGET_MIPS64. This is
needed so that GPRs are 64 bit, and combined with MMI registers,
they will form full 128 bit registers.
Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551183797-13570-2-git-send-email-mateja.marjanovic@rt-rk.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions