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| author | Alistair Francis | 2016-02-18 15:16:17 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-02-18 15:16:17 +0100 |
| commit | 4054bfa9e7986c9b7d2bf70f9e10af9647e376fc (patch) | |
| tree | 164c863496140c88f8c906fd58f429b7ca75fe5f /include | |
| parent | target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case (diff) | |
| download | qemu-4054bfa9e7986c9b7d2bf70f9e10af9647e376fc.tar.gz qemu-4054bfa9e7986c9b7d2bf70f9e10af9647e376fc.tar.xz qemu-4054bfa9e7986c9b7d2bf70f9e10af9647e376fc.zip | |
target-arm: Add the pmceid0 and pmceid1 registers
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Tested-by: Nathan Rossi <nathan@nathanrossi.com>
Message-id: da0563119a9f56fd5fbdc26e7ed19a8a8457c5b9.1455060548.git.alistair.francis@xilinx.com
[PMM: Use 0 for PMCEID0 values for A15 and A57 since our PMU
does not currently implement any events.]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions