diff options
| author | Peter Xu | 2016-05-10 12:21:21 +0200 |
|---|---|---|
| committer | Paolo Bonzini | 2016-05-23 16:53:43 +0200 |
| commit | 479c2a1cb7fb82d23e66eab78b00fc5b0638439b (patch) | |
| tree | 3624ee9775bb357daf54e7706329dd90fc5ec0ad /include | |
| parent | target-i386: key sfence availability on CPUID_SSE, not CPUID_SSE2 (diff) | |
| download | qemu-479c2a1cb7fb82d23e66eab78b00fc5b0638439b.tar.gz qemu-479c2a1cb7fb82d23e66eab78b00fc5b0638439b.tar.xz qemu-479c2a1cb7fb82d23e66eab78b00fc5b0638439b.zip | |
ioapic: keep RO bits for IOAPIC entry
Currently IOAPIC RO bits can be written. To be better aligned with
hardware, we should let them read-only.
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
Message-Id: <1462875682-1349-2-git-send-email-peterx@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/i386/ioapic_internal.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index 797ed47305..cab9e67ee7 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -47,6 +47,11 @@ #define IOAPIC_LVT_DEST_MODE (1 << IOAPIC_LVT_DEST_MODE_SHIFT) #define IOAPIC_LVT_DELIV_MODE (7 << IOAPIC_LVT_DELIV_MODE_SHIFT) +/* Bits that are read-only for IOAPIC entry */ +#define IOAPIC_RO_BITS (IOAPIC_LVT_REMOTE_IRR | \ + IOAPIC_LVT_DELIV_STATUS) +#define IOAPIC_RW_BITS (~(uint64_t)IOAPIC_RO_BITS) + #define IOAPIC_TRIGGER_EDGE 0 #define IOAPIC_TRIGGER_LEVEL 1 |