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| author | Suraj Jitindar Singh | 2017-05-02 08:37:18 +0200 |
|---|---|---|
| committer | David Gibson | 2017-05-11 01:45:15 +0200 |
| commit | 545d6e2b5c1e5fd321792bce0ad136c3a192c37b (patch) | |
| tree | dffa48fe22d4dc8699ca84659fa9c223c3ca1614 /include | |
| parent | target/ppc: Implement ISA V3.00 radix page fault handler (diff) | |
| download | qemu-545d6e2b5c1e5fd321792bce0ad136c3a192c37b.tar.gz qemu-545d6e2b5c1e5fd321792bce0ad136c3a192c37b.tar.xz qemu-545d6e2b5c1e5fd321792bce0ad136c3a192c37b.zip | |
target/ppc: Enable RADIX mmu mode for pseries TCG guest
Now that we have added all the infrastructure we can enable a pseries TCG
guest to use radix.
In order to do this we have to add the appropriate bits to the
ibm,arch-vec-5-platform-support vector to represent that we support both
hash and radix mmu models.
A radix guest can now be booted in pseries tcg mode by specifying:
-cpu POWER9
Note that we assume hash, that is we allocate a hpt, until a guest tells
us otherwise via a H_REGISTER_PROCESS_TABLE call with radix specified - in
which case we free the hpt. If we were right and the guest is hash then
there's nothing for us to do.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions