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| author | Peter Maydell | 2018-08-20 12:24:31 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-20 12:24:31 +0200 |
| commit | 55b53c718b2f684793eeefcf1c1a548ee97e23aa (patch) | |
| tree | c80a4ad2262854639b34aa6326f6abeaa672f41f /include | |
| parent | imx_serial: Generate interrupt on receive data ready if enabled (diff) | |
| download | qemu-55b53c718b2f684793eeefcf1c1a548ee97e23aa.tar.gz qemu-55b53c718b2f684793eeefcf1c1a548ee97e23aa.tar.xz qemu-55b53c718b2f684793eeefcf1c1a548ee97e23aa.zip | |
target/arm: Correct typo in HAMAIR1 regdef name
We implement the HAMAIR1 register as RAZ/WI; we had a typo in the
regdef, though, and were incorrectly naming it HMAIR1 (which is
a different register which we also implement as RAZ/WI).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180814124254.5229-2-peter.maydell@linaro.org
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions