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authorRichard Henderson2018-10-20 22:54:46 +0200
committerRichard Henderson2018-10-31 13:16:02 +0100
commit60a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4 (patch)
tree5be474696ef4d3007d8ac189f3d2e6bff66c2735 /include
parentcputlb: Remove tcg_enabled hack from tlb_flush_nocheck (diff)
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cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush
Protect it with the tlb_lock instead of using atomics. The move puts it in or near the same cacheline as the lock; using the lock means we don't need a second atomic operation in order to perform the update. Which makes it cheap to also update pending_flush in tlb_flush_by_mmuidx_async_work. Tested-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/exec/cpu-defs.h8
-rw-r--r--include/qom/cpu.h6
2 files changed, 7 insertions, 7 deletions
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 9005923b4d..659c73d2a1 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -145,8 +145,14 @@ typedef struct CPUIOTLBEntry {
* Data elements that are shared between all MMU modes.
*/
typedef struct CPUTLBCommon {
- /* lock serializes updates to tlb_table and tlb_v_table */
+ /* Serialize updates to tlb_table and tlb_v_table, and others as noted. */
QemuSpin lock;
+ /*
+ * Within pending_flush, for each bit N, there exists an outstanding
+ * cross-cpu flush for mmu_idx N. Further cross-cpu flushes to that
+ * mmu_idx may be discarded. Protected by tlb_c.lock.
+ */
+ uint16_t pending_flush;
} CPUTLBCommon;
/*
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index def0c64308..1396f53e5b 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -429,12 +429,6 @@ struct CPUState {
struct hax_vcpu_state *hax_vcpu;
- /* The pending_tlb_flush flag is set and cleared atomically to
- * avoid potential races. The aim of the flag is to avoid
- * unnecessary flushes.
- */
- uint16_t pending_tlb_flush;
-
int hvf_fd;
/* track IOMMUs whose translations we've cached in the TCG TLB */