diff options
| author | Dmitry Fleytman | 2016-06-01 10:23:33 +0200 |
|---|---|---|
| committer | Jason Wang | 2016-06-02 04:42:26 +0200 |
| commit | 6383292ac884f01be609f69d888f54c099af622e (patch) | |
| tree | 9d808a58d22f5c9b0a3bf2403f256cf38d4fb064 /include | |
| parent | pci: Introduce define for PM capability version 1.1 (diff) | |
| download | qemu-6383292ac884f01be609f69d888f54c099af622e.tar.gz qemu-6383292ac884f01be609f69d888f54c099af622e.tar.xz qemu-6383292ac884f01be609f69d888f54c099af622e.zip | |
pcie: Add support for PCIe CAP v1
Added support for PCIe CAP v1, while reusing some of the existing v2
infrastructure.
Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com>
Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci/pcie.h | 4 | ||||
| -rw-r--r-- | include/hw/pci/pcie_regs.h | 5 |
2 files changed, 7 insertions, 2 deletions
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index b48a7a2c5a..cbbf0c5e08 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -80,8 +80,12 @@ struct PCIExpressDevice { /* PCI express capability helper functions */ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); +int pcie_cap_v1_init(PCIDevice *dev, uint8_t offset, + uint8_t type, uint8_t port); int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset); void pcie_cap_exit(PCIDevice *dev); +int pcie_endpoint_cap_v1_init(PCIDevice *dev, uint8_t offset); +void pcie_cap_v1_exit(PCIDevice *dev); uint8_t pcie_cap_get_type(const PCIDevice *dev); void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector); uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index 6a28b33e69..a95522a13b 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -11,6 +11,7 @@ /* express capability */ +#define PCI_EXP_VER1_SIZEOF 0x14 /* express capability of ver. 1 */ #define PCI_EXP_VER2_SIZEOF 0x3c /* express capability of ver. 2 */ #define PCI_EXT_CAP_VER_SHIFT 16 #define PCI_EXT_CAP_NEXT_SHIFT 20 @@ -26,11 +27,11 @@ (((x) + PCI_EXT_CAP_ALIGN - 1) & ~(PCI_EXT_CAP_ALIGN - 1)) /* PCI_EXP_FLAGS */ -#define PCI_EXP_FLAGS_VER2 2 /* for now, supports only ver. 2 */ +#define PCI_EXP_FLAGS_VER1 1 +#define PCI_EXP_FLAGS_VER2 2 #define PCI_EXP_FLAGS_IRQ_SHIFT ctz32(PCI_EXP_FLAGS_IRQ) #define PCI_EXP_FLAGS_TYPE_SHIFT ctz32(PCI_EXP_FLAGS_TYPE) - /* PCI_EXP_LINK{CAP, STA} */ /* link speed */ #define PCI_EXP_LNK_LS_25 1 |