diff options
| author | Jonathan Cameron | 2022-06-16 16:51:24 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2022-06-16 18:54:57 +0200 |
| commit | 638b752da30a9daffb0c92166937a0cb777f9e23 (patch) | |
| tree | e85e72dd6e79802b479bb02d6c955e7deae13369 /include | |
| parent | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (diff) | |
| download | qemu-638b752da30a9daffb0c92166937a0cb777f9e23.tar.gz qemu-638b752da30a9daffb0c92166937a0cb777f9e23.tar.xz qemu-638b752da30a9daffb0c92166937a0cb777f9e23.zip | |
pci-bridge/cxl_upstream: Add a CXL switch upstream port
An initial simple upstream port emulation to allow the creation
of CXL switches. The Device ID has been allocated for this use.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220616145126.8002-2-Jonathan.Cameron@huawei.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/cxl/cxl.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h index 134b295b40..38e0e271d5 100644 --- a/include/hw/cxl/cxl.h +++ b/include/hw/cxl/cxl.h @@ -53,4 +53,9 @@ struct CXLHost { #define TYPE_PXB_CXL_HOST "pxb-cxl-host" OBJECT_DECLARE_SIMPLE_TYPE(CXLHost, PXB_CXL_HOST) +#define TYPE_CXL_USP "cxl-upstream" + +typedef struct CXLUpstreamPort CXLUpstreamPort; +DECLARE_INSTANCE_CHECKER(CXLUpstreamPort, CXL_USP, TYPE_CXL_USP) +CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp); #endif |