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| author | Peter Crosthwaite | 2015-06-19 15:17:44 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-06-19 15:17:44 +0200 |
| commit | 6cb0b013a1fa421cdfb83257cd33f855cc90649a (patch) | |
| tree | d7c505b89b116dd870147145cb094d4848d4c213 /include | |
| parent | target-arm/helper.c: define MPUIR register (diff) | |
| download | qemu-6cb0b013a1fa421cdfb83257cd33f855cc90649a.tar.gz qemu-6cb0b013a1fa421cdfb83257cd33f855cc90649a.tar.xz qemu-6cb0b013a1fa421cdfb83257cd33f855cc90649a.zip | |
target-arm: Add registers for PMSAv7
Define the arm CP registers for PMSAv7 and their accessor functions.
RGNR serves as a shared index that indexes into arrays storing the
DRBAR, DRSR and DRACR registers. DRBAR and friends have to be VMSDd
separately from the CP interface using a new PMSA specific VMSD
subsection.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 172cf135fbd8f5cea413c00e71cc1c3cac704744.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions