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authorJonathan Cameron2022-10-14 17:10:45 +0200
committerMichael S. Tsirkin2022-11-07 19:12:19 +0100
commit882877fc359d24e1563065c5c3887096317ca1ae (patch)
treecba48a286dfddb04603fa3e0d4e6beabd13b79b5 /include
parenthw/mem/cxl-type3: Add CXL CDAT Data Object Exchange (diff)
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hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE
This Data Object Exchange Mailbox allows software to query the latency and bandwidth between ports on the switch. For now only provide information on routes between the upstream port and each downstream port (not p2p). Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> -- Changes since v8: Mostly to match the type 3 equivalent - Move enum out of function and give it a more descriptive namespace. Message-Id: <20221014151045.24781-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/cxl/cxl_cdat.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/cxl/cxl_cdat.h b/include/hw/cxl/cxl_cdat.h
index 52c232e912..e9eda00142 100644
--- a/include/hw/cxl/cxl_cdat.h
+++ b/include/hw/cxl/cxl_cdat.h
@@ -131,6 +131,7 @@ typedef struct CDATSslbisHeader {
uint64_t entry_base_unit;
} QEMU_PACKED CDATSslbisHeader;
+#define CDAT_PORT_ID_USP 0x100
/* Switch Scoped Latency and Bandwidth Entry - CDAT Table 10 */
typedef struct CDATSslbe {
uint16_t port_x_id;