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| author | Peter Maydell | 2020-09-10 19:38:52 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-10-01 16:31:00 +0200 |
| commit | 8a130a7be6e222965641e1fd9469fd3ee752c7d4 (patch) | |
| tree | e6074a5fcc454d3b17ee061b995f66300568abfe /include | |
| parent | target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check (diff) | |
| download | qemu-8a130a7be6e222965641e1fd9469fd3ee752c7d4.tar.gz qemu-8a130a7be6e222965641e1fd9469fd3ee752c7d4.tar.xz qemu-8a130a7be6e222965641e1fd9469fd3ee752c7d4.zip | |
target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
Move the id_pfr0 and id_pfr1 fields into the ARMISARegisters
sub-struct. We're going to want id_pfr1 for an isar_features
check, and moving both at the same time avoids an odd
inconsistency.
Changes other than the ones to cpu.h and kvm64.c made
automatically with:
perl -p -i -e 's/cpu->id_pfr/cpu->isar.id_pfr/' target/arm/*.c hw/intc/armv7m_nvic.c
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200910173855.4068-3-peter.maydell@linaro.org
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions