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| author | Peter Maydell | 2014-01-31 15:47:37 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-01-31 15:47:37 +0100 |
| commit | 956d272eb2996e4d95f8a674256f8a63a0c1e8d4 (patch) | |
| tree | 1adc9d39bb4a0a73cc8e63b40eb69bc6ac636577 /include | |
| parent | target-arm: A64: Add top level decode for SIMD 3-same group (diff) | |
| download | qemu-956d272eb2996e4d95f8a674256f8a63a0c1e8d4.tar.gz qemu-956d272eb2996e4d95f8a674256f8a63a0c1e8d4.tar.xz qemu-956d272eb2996e4d95f8a674256f8a63a0c1e8d4.zip | |
target-arm: A64: Add logic ops from SIMD 3 same group
Add support for the logical operations (ORR, AND, BIC, ORN, EOR, BSL,
BIT and BIF) from the SIMD 3 register same group (C3.6.16).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions