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authorJonathan Cameron2022-04-29 16:40:55 +0200
committerMichael S. Tsirkin2022-05-13 13:57:26 +0200
commitaa970ed586f9c7f178b813bda2919e329b841e3c (patch)
treea13dac626ff3e491b3a38c737a87ddfa82ba345f /include
parenthw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl (diff)
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pci/pcie_port: Add pci_find_port_by_pn()
Simple function to search a PCIBus to find a port by it's port number. CXL interleave decoding uses the port number as a target so it is necessary to locate the port when doing interleave decoding. Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-31-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/pci/pcie_port.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index e25b289ce8..7b8193061a 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -39,6 +39,8 @@ struct PCIEPort {
void pcie_port_init_reg(PCIDevice *d);
+PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
+
#define TYPE_PCIE_SLOT "pcie-slot"
OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)