diff options
| author | Shashi Mallela | 2021-09-13 17:07:23 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-09-13 22:01:08 +0200 |
| commit | ac30dec39652c6fe43484448617c4ca6f26b0841 (patch) | |
| tree | d5c5d11524c9d1723d38f8ba8710849da02d9915 /include | |
| parent | hw/intc: GICv3 ITS Command processing (diff) | |
| download | qemu-ac30dec39652c6fe43484448617c4ca6f26b0841.tar.gz qemu-ac30dec39652c6fe43484448617c4ca6f26b0841.tar.xz qemu-ac30dec39652c6fe43484448617c4ca6f26b0841.zip | |
hw/intc: GICv3 ITS Feature enablement
Added properties to enable ITS feature and define qemu system
address space memory in gicv3 common,setup distributor and
redistributor registers to indicate LPI support.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Message-id: 20210910143951.92242-6-shashi.mallela@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/intc/arm_gicv3_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 0715b0bc2a..c1348cc60a 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -221,6 +221,7 @@ struct GICv3State { uint32_t num_cpu; uint32_t num_irq; uint32_t revision; + bool lpi_enable; bool security_extn; bool irq_reset_nonsecure; bool gicd_no_migration_shift_bug; |