diff options
| author | Simon Veith | 2019-12-20 15:03:00 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-12-20 15:03:00 +0100 |
| commit | b255cafb59578d16716186ed955717bc8f87bdb7 (patch) | |
| tree | 466f59c0ad03a2bfff708d10d76dabb72c06a801 /include | |
| parent | hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro (diff) | |
| download | qemu-b255cafb59578d16716186ed955717bc8f87bdb7.tar.gz qemu-b255cafb59578d16716186ed955717bc8f87bdb7.tar.xz qemu-b255cafb59578d16716186ed955717bc8f87bdb7.zip | |
hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position
The smmuv3_record_event() function that generates the F_STE_FETCH error
uses the EVT_SET_ADDR macro to record the fetch address, placing it in
32-bit words 4 and 5.
The correct position for this address is in words 6 and 7, per the
SMMUv3 Architecture Specification.
Update the function to use the EVT_SET_ADDR2 macro instead, which is the
macro intended for writing to these words.
ref. ARM IHI 0070C, section 7.3.4.
Signed-off-by: Simon Veith <sveith@amazon.de>
Acked-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-id: 1576509312-13083-7-git-send-email-sveith@amazon.de
Cc: Eric Auger <eric.auger@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Acked-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions