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| author | Yongbok Kim | 2015-10-29 16:18:38 +0100 |
|---|---|---|
| committer | Leon Alrae | 2015-10-30 15:36:19 +0100 |
| commit | bb238210bb096534b68dab15a87c6ff0bef43672 (patch) | |
| tree | e05337cda587d151dd9f6e611e6284077c29621e /include | |
| parent | target-mips: Set Config5.XNP for R6 cores (diff) | |
| download | qemu-bb238210bb096534b68dab15a87c6ff0bef43672.tar.gz qemu-bb238210bb096534b68dab15a87c6ff0bef43672.tar.xz qemu-bb238210bb096534b68dab15a87c6ff0bef43672.zip | |
target-mips: add SIGRIE instruction
Add SIGRIE (Signal Reserved Instruction Exception) for both MIPS and
microMIPS.
The instruction allows to use the 16-bit code field for software use.
This instruction is introduced by and required as of Release 6.
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions