diff options
| author | Liu, Yi L | 2019-03-05 03:34:54 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin | 2019-03-13 03:31:21 +0100 |
| commit | c0c1d351849bc249304e0c505e1597e570d1e777 (patch) | |
| tree | 8f0b6665a0985b60b1f4edac39755d12189499c1 /include | |
| parent | intel_iommu: scalable mode emulation (diff) | |
| download | qemu-c0c1d351849bc249304e0c505e1597e570d1e777.tar.gz qemu-c0c1d351849bc249304e0c505e1597e570d1e777.tar.xz qemu-c0c1d351849bc249304e0c505e1597e570d1e777.zip | |
intel_iommu: add 256 bits qi_desc support
Per Intel(R) VT-d 3.0, the qi_desc is 256 bits in Scalable
Mode. This patch adds emulation of 256bits qi_desc.
Signed-off-by: Liu, Yi L <yi.l.liu@intel.com>
[Yi Sun is co-developer to rebase and refine the patch.]
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <1551753295-30167-3-git-send-email-yi.y.sun@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/i386/intel_iommu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 72c5ca6a59..2877c94ca2 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -238,6 +238,7 @@ struct IntelIOMMUState { uint16_t iq_tail; /* Current invalidation queue tail */ dma_addr_t iq; /* Current invalidation queue pointer */ uint16_t iq_size; /* IQ Size in number of entries */ + bool iq_dw; /* IQ descriptor width 256bit or not */ bool qi_enabled; /* Set if the QI is enabled */ uint8_t iq_last_desc_type; /* The type of last completed descriptor */ |