summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorPeter Maydell2017-01-20 12:15:10 +0100
committerPeter Maydell2017-01-20 12:15:10 +0100
commitc5fc89b36c0a167548ae7af40dc085707a7756d2 (patch)
treec8f160dc777465298bc11b31335a37aaaa359abc /include
parenthw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR (diff)
downloadqemu-c5fc89b36c0a167548ae7af40dc085707a7756d2.tar.gz
qemu-c5fc89b36c0a167548ae7af40dc085707a7756d2.tar.xz
qemu-c5fc89b36c0a167548ae7af40dc085707a7756d2.zip
hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
Implement the function which signals virtual interrupts to the CPU as appropriate following CPU interface state changes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1483977924-14522-13-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include')
-rw-r--r--include/hw/intc/arm_gicv3_common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h
index 665d3f81a9..4156051d98 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -150,6 +150,7 @@ struct GICv3CPUState {
qemu_irq parent_fiq;
qemu_irq parent_virq;
qemu_irq parent_vfiq;
+ qemu_irq maintenance_irq;
/* Redistributor */
uint32_t level; /* Current IRQ level */