diff options
| author | Michael Clark | 2018-04-10 10:02:46 +0200 |
|---|---|---|
| committer | Alistair Francis | 2018-09-04 22:19:31 +0200 |
| commit | d78940ec5d07d3b514f2fd8f941c58118fce2815 (patch) | |
| tree | 784811c909ed01f04daf697027ef9ea0edb1d52b /include | |
| parent | RISC-V: Improve page table walker spec compliance (diff) | |
| download | qemu-d78940ec5d07d3b514f2fd8f941c58118fce2815.tar.gz qemu-d78940ec5d07d3b514f2fd8f941c58118fce2815.tar.xz qemu-d78940ec5d07d3b514f2fd8f941c58118fce2815.zip | |
RISC-V: Use atomic_cmpxchg to update PLIC bitmaps
The PLIC previously used a mutex to protect against concurrent
access to the claimed and pending bitfields. Instead of using
a mutex, we update the bitfields using atomic_cmpxchg.
Rename sifive_plic_num_irqs_pending to sifive_plic_irqs_pending
and add an early out if any interrupts are pending as the
count of pending interrupts is not used.
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/riscv/sifive_plic.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/hw/riscv/sifive_plic.h b/include/hw/riscv/sifive_plic.h index 2f2af7e686..688cd97f82 100644 --- a/include/hw/riscv/sifive_plic.h +++ b/include/hw/riscv/sifive_plic.h @@ -55,7 +55,6 @@ typedef struct SiFivePLICState { uint32_t *pending; uint32_t *claimed; uint32_t *enable; - QemuMutex lock; /* config */ char *hart_config; |