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| author | Erik Smit | 2020-06-16 11:32:29 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-16 11:32:29 +0200 |
| commit | d7a64d0063d15bf2ee574f18e4f3fe82f57a32ca (patch) | |
| tree | aec8ff34c648ca65a438ad042545cdec825321aa /include | |
| parent | hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers (diff) | |
| download | qemu-d7a64d0063d15bf2ee574f18e4f3fe82f57a32ca.tar.gz qemu-d7a64d0063d15bf2ee574f18e4f3fe82f57a32ca.tar.xz qemu-d7a64d0063d15bf2ee574f18e4f3fe82f57a32ca.zip | |
Implement configurable descriptor size in ftgmac100
The hardware supports configurable descriptor sizes, configured in the DBLAC
register.
Most drivers use the default 4 word descriptor, which is currently hardcoded,
but Aspeed SDK configures 8 words to store extra data.
Signed-off-by: Erik Smit <erik.lucas.smit@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[PMM: removed unnecessary parens]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions