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| author | Leon Alrae | 2016-06-09 11:46:51 +0200 |
|---|---|---|
| committer | Leon Alrae | 2016-07-12 10:10:15 +0200 |
| commit | dff94251f02708d2ef9aee5149abd69f039e4a13 (patch) | |
| tree | b1bbcc4b3be27605993db87de547bd972d74d86a /include | |
| parent | target-mips: add exception base to MIPS CPU (diff) | |
| download | qemu-dff94251f02708d2ef9aee5149abd69f039e4a13.tar.gz qemu-dff94251f02708d2ef9aee5149abd69f039e4a13.tar.xz qemu-dff94251f02708d2ef9aee5149abd69f039e4a13.zip | |
hw/mips_cpc: make VP correctly start from the reset vector
When VP enters the Run state it starts execution from the reset vector.
Currently used CPU_INTERRUPT_WAKE does not do that if reset exception
base has been modified. Therefore fix that by simply resetting given VP.
Drop the usage of CPU_INTERRUPT_WAKE also in VP_STOP and instead raise
the CPU_INTERRUPT_HALT to halt a VP.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions