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| author | Peter Maydell | 2017-02-07 20:21:30 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-02-07 20:21:30 +0100 |
| commit | f073cd3a2bf1054135271b837c58a7da650dd84b (patch) | |
| tree | e57545e83c1a36940162eea5439fda0cb9f74a7f /include | |
| parent | Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170206' i... (diff) | |
| parent | stellaris: Use the 'unimplemented' device for parts we don't implement (diff) | |
| download | qemu-f073cd3a2bf1054135271b837c58a7da650dd84b.tar.gz qemu-f073cd3a2bf1054135271b837c58a7da650dd84b.tar.xz qemu-f073cd3a2bf1054135271b837c58a7da650dd84b.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170207-1' into staging
target-arm:
* new "unimplemented" device for stubbing out devices in a
system model so accesses can be logged
* stellaris: document the SoC memory map
* arm: create instruction syndromes for AArch32 data aborts
* arm: Correctly handle watchpoints for BE32 CPUs
* Fix Thumb-1 BE32 execution and disassembly
* arm: Add cfgend parameter for ARM CPU selection
* sd: sdhci: check data length during dma_memory_read
* aspeed: add a watchdog controller
* integratorcp: adding vmstate for save/restore
# gpg: Signature made Tue 07 Feb 2017 19:20:19 GMT
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20170207-1:
stellaris: Use the 'unimplemented' device for parts we don't implement
hw/misc: New "unimplemented" sysbus device
stellaris: Document memory map and which SoC devices are unimplemented
target/arm: A32, T32: Create Instruction Syndromes for Data Aborts
target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode
arm: Correctly handle watchpoints for BE32 CPUs
Fix Thumb-1 BE32 execution and disassembly.
target/arm: Add cfgend parameter for ARM CPU selection.
hw/arm/integratorcp: Support specifying features via -cpu
sd: sdhci: check data length during dma_memory_read
aspeed: add a watchdog controller
wdt: Add Aspeed watchdog device model
integratorcp: adding vmstate for save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/disas/bfd.h | 7 | ||||
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 2 | ||||
| -rw-r--r-- | include/hw/misc/unimp.h | 39 | ||||
| -rw-r--r-- | include/hw/watchdog/wdt_aspeed.h | 32 | ||||
| -rw-r--r-- | include/qom/cpu.h | 3 |
5 files changed, 83 insertions, 0 deletions
diff --git a/include/disas/bfd.h b/include/disas/bfd.h index 0435b8c9f9..b01e002b4c 100644 --- a/include/disas/bfd.h +++ b/include/disas/bfd.h @@ -295,6 +295,7 @@ typedef struct disassemble_info { The bottom 16 bits are for the internal use of the disassembler. */ unsigned long flags; #define INSN_HAS_RELOC 0x80000000 +#define INSN_ARM_BE32 0x00010000 PTR private_data; /* Function used to get bytes to disassemble. MEMADDR is the @@ -306,6 +307,12 @@ typedef struct disassemble_info { (bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info); + /* A place to stash the real read_memory_func if read_memory_func wants to + do some funky address arithmetic or similar (e.g. for ARM BE32 mode). */ + int (*read_memory_inner_func) + (bfd_vma memaddr, bfd_byte *myaddr, int length, + struct disassemble_info *info); + /* Function which should be called if we get an error that we can't recover from. STATUS is the errno value from read_memory_func and MEMADDR is the address that we were trying to read. INFO is a diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 1ab5deaa08..dbec0c1598 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -19,6 +19,7 @@ #include "hw/timer/aspeed_timer.h" #include "hw/i2c/aspeed_i2c.h" #include "hw/ssi/aspeed_smc.h" +#include "hw/watchdog/wdt_aspeed.h" #define ASPEED_SPIS_NUM 2 @@ -37,6 +38,7 @@ typedef struct AspeedSoCState { AspeedSMCState fmc; AspeedSMCState spi[ASPEED_SPIS_NUM]; AspeedSDMCState sdmc; + AspeedWDTState wdt; } AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h new file mode 100644 index 0000000000..3462d85836 --- /dev/null +++ b/include/hw/misc/unimp.h @@ -0,0 +1,39 @@ +/* + * "Unimplemented" device + * + * Copyright Linaro Limited, 2017 + * Written by Peter Maydell + */ + +#ifndef HW_MISC_UNIMP_H +#define HW_MISC_UNIMP_H + +#define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device" + +/** + * create_unimplemented_device: create and map a dummy device + * @name: name of the device for debug logging + * @base: base address of the device's MMIO region + * @size: size of the device's MMIO region + * + * This utility function creates and maps an instance of unimplemented-device, + * which is a dummy device which simply logs all guest accesses to + * it via the qemu_log LOG_UNIMP debug log. + * The device is mapped at priority -1000, which means that you can + * use it to cover a large region and then map other devices on top of it + * if necessary. + */ +static inline void create_unimplemented_device(const char *name, + hwaddr base, + hwaddr size) +{ + DeviceState *dev = qdev_create(NULL, TYPE_UNIMPLEMENTED_DEVICE); + + qdev_prop_set_string(dev, "name", name); + qdev_prop_set_uint64(dev, "size", size); + qdev_init_nofail(dev); + + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, base, -1000); +} + +#endif diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h new file mode 100644 index 0000000000..080c223122 --- /dev/null +++ b/include/hw/watchdog/wdt_aspeed.h @@ -0,0 +1,32 @@ +/* + * ASPEED Watchdog Controller + * + * Copyright (C) 2016-2017 IBM Corp. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ +#ifndef ASPEED_WDT_H +#define ASPEED_WDT_H + +#include "hw/sysbus.h" + +#define TYPE_ASPEED_WDT "aspeed.wdt" +#define ASPEED_WDT(obj) \ + OBJECT_CHECK(AspeedWDTState, (obj), TYPE_ASPEED_WDT) + +#define ASPEED_WDT_REGS_MAX (0x20 / 4) + +typedef struct AspeedWDTState { + /*< private >*/ + SysBusDevice parent_obj; + QEMUTimer *timer; + + /*< public >*/ + MemoryRegion iomem; + uint32_t regs[ASPEED_WDT_REGS_MAX]; + + uint32_t pclk_freq; +} AspeedWDTState; + +#endif /* ASPEED_WDT_H */ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index ca4d0fb1b4..45bcf21a21 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -132,6 +132,8 @@ struct TranslationBlock; * @cpu_exec_exit: Callback for cpu_exec cleanup. * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec. * @disas_set_info: Setup architecture specific components of disassembly info + * @adjust_watchpoint_address: Perform a target-specific adjustment to an + * address before attempting to match it against watchpoints. * * Represents a CPU family or model. */ @@ -195,6 +197,7 @@ typedef struct CPUClass { bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); void (*disas_set_info)(CPUState *cpu, disassemble_info *info); + vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len); } CPUClass; #ifdef HOST_WORDS_BIGENDIAN |
