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| author | Richard Henderson | 2018-03-27 05:37:24 +0200 |
|---|---|---|
| committer | Richard Henderson | 2018-03-28 06:45:16 +0200 |
| commit | f2f1dde75160cac6ede330f3db50dc817d01a2d6 (patch) | |
| tree | 933b2b35632e7a598eba1b9495f64a86f0801893 /include | |
| parent | Update version for v2.12.0-rc1 release (diff) | |
| download | qemu-f2f1dde75160cac6ede330f3db50dc817d01a2d6.tar.gz qemu-f2f1dde75160cac6ede330f3db50dc817d01a2d6.tar.xz qemu-f2f1dde75160cac6ede330f3db50dc817d01a2d6.zip | |
tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops
Failure to do so results in the tcg optimizer sign-extending
any constant fold from 32-bits. This turns out to be visible
in the RISC-V testsuite using a host that emits these opcodes
(e.g. any non-x86_64).
Reported-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions