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authorAnthony Liguori2013-12-20 02:03:17 +0100
committerAnthony Liguori2013-12-20 02:03:17 +0100
commitf8251db121c3f051b22a7536b97d160c30bcccd4 (patch)
tree093964c9d5d8dbb5e597c95f347f176ab57c3428 /include
parentMerge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131217' into st... (diff)
parentspapr: limit numa memory regions by ram size (diff)
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Merge remote-tracking branch 'agraf/tags/signed-ppc-for-upstream' into staging
Patch queue for ppc - 2013-12-20 Alexander Graf (3): PPC: Use default pci bus name for grackle and heathrow roms: Flush icache when writing roms to guest memory PPC: Add VSX to hflags Alexey Kardashevskiy (5): powerpc: add PVR mask support target-ppc: move POWER7+ to a separate family spapr-rtas: replace return code constants with macros spapr-rtas: add ibm, (get|set)-system-parameter spapr: make sure RMA is in first mode of first memory node Greg Kurz (1): target-ppc: add stubs for KVM breakpoints Paolo Bonzini (1): spapr: tie spapr-nvram to -pflash Paul Mackerras (1): spapr: limit numa memory regions by ram size Peter Crosthwaite (2): device_tree: s/qemu_devtree/qemu_fdt globally device_tree: qemu_fdt_setprop: Rename val_array arg Tom Musta (19): Declare and Enable VSX Add MSR VSX and Associated Exception Add VSX Instruction Decoders Add VSR to Global Registers Add lxvd2x Add stxvd2x Add xxpermdi Add lxsdx Add lxvdsx Add lxvw4x Add stxsdx Add stxvw4x Add VSX Scalar Move Instructions Add VSX Vector Move Instructions Add Power7 VSX Logical Instructions Add xxmrgh/xxmrgl Add xxsel Add xxspltw Add xxsldwi * agraf/tags/signed-ppc-for-upstream: (32 commits) spapr: limit numa memory regions by ram size spapr: make sure RMA is in first mode of first memory node device_tree: qemu_fdt_setprop: Rename val_array arg device_tree: s/qemu_devtree/qemu_fdt globally PPC: Add VSX to hflags Add xxsldwi Add xxspltw Add xxsel Add xxmrgh/xxmrgl Add Power7 VSX Logical Instructions Add VSX Vector Move Instructions Add VSX Scalar Move Instructions roms: Flush icache when writing roms to guest memory spapr: tie spapr-nvram to -pflash PPC: Use default pci bus name for grackle and heathrow spapr-rtas: add ibm, (get|set)-system-parameter spapr-rtas: replace return code constants with macros target-ppc: move POWER7+ to a separate family Add stxvw4x Add stxsdx ...
Diffstat (limited to 'include')
-rw-r--r--include/exec/cpu-common.h1
-rw-r--r--include/hw/ppc/spapr.h9
-rw-r--r--include/sysemu/device_tree.h80
3 files changed, 50 insertions, 40 deletions
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index e4996e19c3..8f33122c9f 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -110,6 +110,7 @@ void stq_phys(hwaddr addr, uint64_t val);
void cpu_physical_memory_write_rom(hwaddr addr,
const uint8_t *buf, int len);
+void cpu_flush_icache_range(hwaddr start, int len);
extern struct MemoryRegion io_mem_rom;
extern struct MemoryRegion io_mem_notdirty;
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index fdaab2de52..b2f11e9a2c 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -332,6 +332,15 @@ static inline int spapr_allocate_lsi(int hint)
return spapr_allocate_irq(hint, true);
}
+/* RTAS return codes */
+#define RTAS_OUT_SUCCESS 0
+#define RTAS_OUT_NO_ERRORS_FOUND 1
+#define RTAS_OUT_HW_ERROR -1
+#define RTAS_OUT_BUSY -2
+#define RTAS_OUT_PARAM_ERROR -3
+#define RTAS_OUT_NOT_SUPPORTED -3
+#define RTAS_OUT_NOT_AUTHORIZED -9002
+
static inline uint64_t ppc64_phys_to_real(uint64_t addr)
{
return addr & ~0xF000000000000000ULL;
diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h
index 2b58baf8b1..899f05c138 100644
--- a/include/sysemu/device_tree.h
+++ b/include/sysemu/device_tree.h
@@ -17,27 +17,27 @@
void *create_device_tree(int *sizep);
void *load_device_tree(const char *filename_path, int *sizep);
-int qemu_devtree_setprop(void *fdt, const char *node_path,
- const char *property, const void *val_array, int size);
-int qemu_devtree_setprop_cell(void *fdt, const char *node_path,
- const char *property, uint32_t val);
-int qemu_devtree_setprop_u64(void *fdt, const char *node_path,
- const char *property, uint64_t val);
-int qemu_devtree_setprop_string(void *fdt, const char *node_path,
- const char *property, const char *string);
-int qemu_devtree_setprop_phandle(void *fdt, const char *node_path,
- const char *property,
- const char *target_node_path);
-const void *qemu_devtree_getprop(void *fdt, const char *node_path,
- const char *property, int *lenp);
-uint32_t qemu_devtree_getprop_cell(void *fdt, const char *node_path,
- const char *property);
-uint32_t qemu_devtree_get_phandle(void *fdt, const char *path);
-uint32_t qemu_devtree_alloc_phandle(void *fdt);
-int qemu_devtree_nop_node(void *fdt, const char *node_path);
-int qemu_devtree_add_subnode(void *fdt, const char *name);
+int qemu_fdt_setprop(void *fdt, const char *node_path,
+ const char *property, const void *val, int size);
+int qemu_fdt_setprop_cell(void *fdt, const char *node_path,
+ const char *property, uint32_t val);
+int qemu_fdt_setprop_u64(void *fdt, const char *node_path,
+ const char *property, uint64_t val);
+int qemu_fdt_setprop_string(void *fdt, const char *node_path,
+ const char *property, const char *string);
+int qemu_fdt_setprop_phandle(void *fdt, const char *node_path,
+ const char *property,
+ const char *target_node_path);
+const void *qemu_fdt_getprop(void *fdt, const char *node_path,
+ const char *property, int *lenp);
+uint32_t qemu_fdt_getprop_cell(void *fdt, const char *node_path,
+ const char *property);
+uint32_t qemu_fdt_get_phandle(void *fdt, const char *path);
+uint32_t qemu_fdt_alloc_phandle(void *fdt);
+int qemu_fdt_nop_node(void *fdt, const char *node_path);
+int qemu_fdt_add_subnode(void *fdt, const char *name);
-#define qemu_devtree_setprop_cells(fdt, node_path, property, ...) \
+#define qemu_fdt_setprop_cells(fdt, node_path, property, ...) \
do { \
uint32_t qdt_tmp[] = { __VA_ARGS__ }; \
int i; \
@@ -45,14 +45,14 @@ int qemu_devtree_add_subnode(void *fdt, const char *name);
for (i = 0; i < ARRAY_SIZE(qdt_tmp); i++) { \
qdt_tmp[i] = cpu_to_be32(qdt_tmp[i]); \
} \
- qemu_devtree_setprop(fdt, node_path, property, qdt_tmp, \
- sizeof(qdt_tmp)); \
+ qemu_fdt_setprop(fdt, node_path, property, qdt_tmp, \
+ sizeof(qdt_tmp)); \
} while (0)
-void qemu_devtree_dumpdtb(void *fdt, int size);
+void qemu_fdt_dumpdtb(void *fdt, int size);
/**
- * qemu_devtree_setprop_sized_cells_from_array:
+ * qemu_fdt_setprop_sized_cells_from_array:
* @fdt: device tree blob
* @node_path: node to set property on
* @property: property to set
@@ -72,20 +72,20 @@ void qemu_devtree_dumpdtb(void *fdt, int size);
* the number of cells used for each element vary depending on the
* #address-cells and #size-cells properties of their parent node.
* If you know all your cell elements are one cell wide you can use the
- * simpler qemu_devtree_setprop_cells(). If you're not setting up the
- * array programmatically, qemu_devtree_setprop_sized_cells may be more
+ * simpler qemu_fdt_setprop_cells(). If you're not setting up the
+ * array programmatically, qemu_fdt_setprop_sized_cells may be more
* convenient.
*
* Return value: 0 on success, <0 on error.
*/
-int qemu_devtree_setprop_sized_cells_from_array(void *fdt,
- const char *node_path,
- const char *property,
- int numvalues,
- uint64_t *values);
+int qemu_fdt_setprop_sized_cells_from_array(void *fdt,
+ const char *node_path,
+ const char *property,
+ int numvalues,
+ uint64_t *values);
/**
- * qemu_devtree_setprop_sized_cells:
+ * qemu_fdt_setprop_sized_cells:
* @fdt: device tree blob
* @node_path: node to set property on
* @property: property to set
@@ -97,17 +97,17 @@ int qemu_devtree_setprop_sized_cells_from_array(void *fdt,
* used by this value" and "value".
*
* This is a convenience wrapper for the function
- * qemu_devtree_setprop_sized_cells_from_array().
+ * qemu_fdt_setprop_sized_cells_from_array().
*
* Return value: 0 on success, <0 on error.
*/
-#define qemu_devtree_setprop_sized_cells(fdt, node_path, property, ...) \
- ({ \
- uint64_t qdt_tmp[] = { __VA_ARGS__ }; \
- qemu_devtree_setprop_sized_cells_from_array(fdt, node_path, \
- property, \
- ARRAY_SIZE(qdt_tmp) / 2, \
- qdt_tmp); \
+#define qemu_fdt_setprop_sized_cells(fdt, node_path, property, ...) \
+ ({ \
+ uint64_t qdt_tmp[] = { __VA_ARGS__ }; \
+ qemu_fdt_setprop_sized_cells_from_array(fdt, node_path, \
+ property, \
+ ARRAY_SIZE(qdt_tmp) / 2, \
+ qdt_tmp); \
})
#endif /* __DEVICE_TREE_H__ */