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| author | Peter Crosthwaite | 2013-06-03 18:17:43 +0200 |
|---|---|---|
| committer | Peter Maydell | 2013-06-03 18:17:43 +0200 |
| commit | 2133a5f6b8f8941a6a3734c6c1990656553de76c (patch) | |
| tree | 886e8997b1b0625734040b6765b129736d59aeed /ldscripts/mips.ld | |
| parent | xilinx_spips: lqspi: Dont touch config register (diff) | |
| download | qemu-2133a5f6b8f8941a6a3734c6c1990656553de76c.tar.gz qemu-2133a5f6b8f8941a6a3734c6c1990656553de76c.tar.xz qemu-2133a5f6b8f8941a6a3734c6c1990656553de76c.zip | |
xilinx_spips: Fix CTRL register RW bits
The CTRL register was RAZ/WI on some of the RW bits. Even though the
function behind these bits is invalid in QEMU, they should still be
guest accessible. Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: b7aaad93163ce4af0c428635804ac7b77a567b25.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'ldscripts/mips.ld')
0 files changed, 0 insertions, 0 deletions