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| author | Alexander Graf | 2014-06-04 12:02:00 +0200 |
|---|---|---|
| committer | Alexander Graf | 2014-06-16 13:24:41 +0200 |
| commit | b061808d39fa11ecc6c07cec7bef6676669c1f3e (patch) | |
| tree | 199445f035bc50888f7dd9a1854b21ea3b7728c2 /linux-headers/asm-mips | |
| parent | linux-headers: include psci.h (diff) | |
| download | qemu-b061808d39fa11ecc6c07cec7bef6676669c1f3e.tar.gz qemu-b061808d39fa11ecc6c07cec7bef6676669c1f3e.tar.xz qemu-b061808d39fa11ecc6c07cec7bef6676669c1f3e.zip | |
linux-headers: update linux headers to kvm/next
This updates the kvm headers to commit 820b3fcd in kvm/next.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'linux-headers/asm-mips')
| -rw-r--r-- | linux-headers/asm-mips/kvm.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/linux-headers/asm-mips/kvm.h b/linux-headers/asm-mips/kvm.h index f09ff5ae20..2c04b6d9ff 100644 --- a/linux-headers/asm-mips/kvm.h +++ b/linux-headers/asm-mips/kvm.h @@ -106,6 +106,41 @@ struct kvm_fpu { #define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33) #define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34) +/* KVM specific control registers */ + +/* + * CP0_Count control + * DC: Set 0: Master disable CP0_Count and set COUNT_RESUME to now + * Set 1: Master re-enable CP0_Count with unchanged bias, handling timer + * interrupts since COUNT_RESUME + * This can be used to freeze the timer to get a consistent snapshot of + * the CP0_Count and timer interrupt pending state, while also resuming + * safely without losing time or guest timer interrupts. + * Other: Reserved, do not change. + */ +#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ + 0x20000 | 0) +#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001 + +/* + * CP0_Count resume monotonic nanoseconds + * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master + * disable). Any reads and writes of Count related registers while + * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is + * cleared again (master enable) any timer interrupts since this time will be + * emulated. + * Modifications to times in the future are rejected. + */ +#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ + 0x20000 | 1) +/* + * CP0_Count rate in Hz + * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without + * discontinuities in CP0_Count. + */ +#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ + 0x20000 | 2) + /* * KVM MIPS specific structures and definitions * |