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| author | Michael Clark | 2019-01-15 00:58:42 +0100 |
|---|---|---|
| committer | Palmer Dabbelt | 2019-02-12 00:56:22 +0100 |
| commit | db9f3fd69d5bccfd25f84d5cec805308406b7b8f (patch) | |
| tree | cee5f026997c7f3a4b9537d2dc846bbb86e4149d /linux-user/cpu_loop-common.h | |
| parent | RISC-V: Add priv_ver to DisasContext (diff) | |
| download | qemu-db9f3fd69d5bccfd25f84d5cec805308406b7b8f.tar.gz qemu-db9f3fd69d5bccfd25f84d5cec805308406b7b8f.tar.xz qemu-db9f3fd69d5bccfd25f84d5cec805308406b7b8f.zip | |
RISC-V: Add misa to DisasContext
gen methods should access state from DisasContext. Add misa
field to the DisasContext struct and remove CPURISCVState
argument from all gen methods.
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'linux-user/cpu_loop-common.h')
0 files changed, 0 insertions, 0 deletions