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| author | Richard Henderson | 2019-05-06 23:49:25 +0200 |
|---|---|---|
| committer | Richard Henderson | 2019-09-04 21:53:33 +0200 |
| commit | 62f2b0389ff6fc7856b801bb5bee1c2d364d3e6c (patch) | |
| tree | 67be040ef1a5bab9ee48aabfcaffdb15432d4409 /linux-user/openrisc | |
| parent | target/openrisc: Check CPUCFG_OF32S for float insns (diff) | |
| download | qemu-62f2b0389ff6fc7856b801bb5bee1c2d364d3e6c.tar.gz qemu-62f2b0389ff6fc7856b801bb5bee1c2d364d3e6c.tar.xz qemu-62f2b0389ff6fc7856b801bb5bee1c2d364d3e6c.zip | |
target/openrisc: Add support for ORFPX64A32
This is hardware support for double-precision floating-point using
pairs of 32-bit registers. Fix latent bugs in the heretofore unused
helper_itofd and helper_ftoid. Include the bit for cpu "any".
Change the default cpu for linux-user to "any".
Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/openrisc')
| -rw-r--r-- | linux-user/openrisc/target_elf.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/linux-user/openrisc/target_elf.h b/linux-user/openrisc/target_elf.h index 40ceb025c9..265ecd3079 100644 --- a/linux-user/openrisc/target_elf.h +++ b/linux-user/openrisc/target_elf.h @@ -9,6 +9,6 @@ #define OPENRISC_TARGET_ELF_H static inline const char *cpu_get_model(uint32_t eflags) { - return "or1200"; + return "any"; } #endif |