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| author | Alistair Francis | 2022-10-12 03:14:49 +0200 |
|---|---|---|
| committer | Alistair Francis | 2022-10-14 06:36:19 +0200 |
| commit | 47566421f029b0a489b63f8195b3ff944e017056 (patch) | |
| tree | 3789591a775e05ed8aaaa06f1c0dcf90de03dc93 /linux-user/sparc | |
| parent | hw/intc: sifive_plic: change interrupt priority register to WARL field (diff) | |
| download | qemu-47566421f029b0a489b63f8195b3ff944e017056.tar.gz qemu-47566421f029b0a489b63f8195b3ff944e017056.tar.xz qemu-47566421f029b0a489b63f8195b3ff944e017056.zip | |
target/riscv: pmp: Fixup TLB size calculation
Since commit 4047368938f6 "accel/tcg: Introduce tlb_set_page_full" we
have been seeing this assert
../accel/tcg/cputlb.c:1294: tlb_set_page_with_attrs: Assertion `is_power_of_2(size)' failed.
When running Tock on the OpenTitan machine.
The issue is that pmp_get_tlb_size() would return a TLB size that wasn't
a power of 2. The size was also smaller then TARGET_PAGE_SIZE.
This patch ensures that any TLB size less then TARGET_PAGE_SIZE is
rounded down to 1 to ensure it's a valid size.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221012011449.506928-1-alistair.francis@opensource.wdc.com
Message-Id: <20221012011449.506928-1-alistair.francis@opensource.wdc.com>
Diffstat (limited to 'linux-user/sparc')
0 files changed, 0 insertions, 0 deletions