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author | Alexander Graf | 2022-10-05 00:56:41 +0200 |
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committer | Paolo Bonzini | 2022-10-11 09:36:01 +0200 |
commit | 62a44fddb24fec35a6baf7e2c52b0e935a5bfa90 (patch) | |
tree | 354dea0d102d32456619975236027ee8b6cbc33c /linux-user/uaccess.c | |
parent | target/i386: Enable TARGET_TB_PCREL (diff) | |
download | qemu-62a44fddb24fec35a6baf7e2c52b0e935a5bfa90.tar.gz qemu-62a44fddb24fec35a6baf7e2c52b0e935a5bfa90.tar.xz qemu-62a44fddb24fec35a6baf7e2c52b0e935a5bfa90.zip |
x86: Implement MSR_CORE_THREAD_COUNT MSR
Intel CPUs starting with Haswell-E implement a new MSR called
MSR_CORE_THREAD_COUNT which exposes the number of threads and cores
inside of a package.
This MSR is used by XNU to populate internal data structures and not
implementing it prevents virtual machines with more than 1 vCPU from
booting if the emulated CPU generation is at least Haswell-E.
This patch propagates the existing hvf logic from patch 027ac0cb516
("target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT") to TCG.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-Id: <20221004225643.65036-2-agraf@csgraf.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'linux-user/uaccess.c')
0 files changed, 0 insertions, 0 deletions