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| author | Peter Maydell | 2016-10-24 17:26:56 +0200 |
|---|---|---|
| committer | Peter Maydell | 2016-10-24 17:26:56 +0200 |
| commit | 19a6e31c9d2701ef648b70ddcfc3bf64cec8c37e (patch) | |
| tree | be8919d03be424ede566db09efe884a98fa13c30 /linux-user | |
| parent | hw/display: QOM'ify pl110.c (diff) | |
| download | qemu-19a6e31c9d2701ef648b70ddcfc3bf64cec8c37e.tar.gz qemu-19a6e31c9d2701ef648b70ddcfc3bf64cec8c37e.tar.xz qemu-19a6e31c9d2701ef648b70ddcfc3bf64cec8c37e.zip | |
target-arm: Implement new HLT trap for semihosting
Version 2.0 of the semihosting specification introduces new trap
instructions for AArch32: HLT 0xF000 for A32 and HLT 0x3C for T32.
Implement these (in the same way we implement the existing HLT
semihosting trap for A64).
The old traps via SVC and BKPT are unaffected.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1476792973-18508-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'linux-user')
| -rw-r--r-- | linux-user/main.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/linux-user/main.c b/linux-user/main.c index c6f2e20c09..54970bc4d9 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -806,6 +806,9 @@ void cpu_loop(CPUARMState *env) } } break; + case EXCP_SEMIHOST: + env->regs[0] = do_arm_semihosting(env); + break; case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; |