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| author | Alexander Graf | 2012-09-29 17:32:38 +0200 |
|---|---|---|
| committer | Riku Voipio | 2012-10-12 13:38:36 +0200 |
| commit | 4a1def4e4ec2f0eb72b15596a04a030cdc889370 (patch) | |
| tree | c032428d0d06ee26a79c5f5cefb3136baff0c5db /linux-user | |
| parent | tcg: Remove TCG_TARGET_HAS_GUEST_BASE define (diff) | |
| download | qemu-4a1def4e4ec2f0eb72b15596a04a030cdc889370.tar.gz qemu-4a1def4e4ec2f0eb72b15596a04a030cdc889370.tar.xz qemu-4a1def4e4ec2f0eb72b15596a04a030cdc889370.zip | |
linux-user: ppc: mark as long long aligned
The SysV PPC32 ABI dictates that long long (64bit) parameters are pass in odd/even
register pairs. Because unlike ARM and MIPS we start at an odd register number,
we can reuse the same aligning code that ARM and MIPS use.
Clarified inline comment that it is SysV ABI that requires long long aligned
parameters - Riku
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Diffstat (limited to 'linux-user')
| -rw-r--r-- | linux-user/syscall.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 009bf8f1a9..3da8e5137c 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -587,12 +587,17 @@ extern int setfsgid(int); extern int setgroups(int, gid_t *); /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */ -#ifdef TARGET_ARM +#ifdef TARGET_ARM static inline int regpairs_aligned(void *cpu_env) { return ((((CPUARMState *)cpu_env)->eabi) == 1) ; } #elif defined(TARGET_MIPS) static inline int regpairs_aligned(void *cpu_env) { return 1; } +#elif defined(TARGET_PPC) && !defined(TARGET_PPC64) +/* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs + * of registers which translates to the same as ARM/MIPS, because we start with + * r3 as arg1 */ +static inline int regpairs_aligned(void *cpu_env) { return 1; } #else static inline int regpairs_aligned(void *cpu_env) { return 0; } #endif |