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| author | Christophe Lyon | 2018-04-16 11:18:25 +0200 |
|---|---|---|
| committer | Laurent Vivier | 2018-04-30 09:51:31 +0200 |
| commit | 62aaa5146476911aea1fbe6fbf919d06bba8ab5d (patch) | |
| tree | c37442b99e1d6a6070675c62e0154f12506f8eb1 /linux-user | |
| parent | linux-user: move xtensa cpu loop to xtensa directory (diff) | |
| download | qemu-62aaa5146476911aea1fbe6fbf919d06bba8ab5d.tar.gz qemu-62aaa5146476911aea1fbe6fbf919d06bba8ab5d.tar.xz qemu-62aaa5146476911aea1fbe6fbf919d06bba8ab5d.zip | |
linux-user: Add ARM get_tls syscall support
Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20180416091845.7315-1-christophe.lyon@st.com>
[lv: moved the change to linux-user/arm/cpu_loop.c]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user')
| -rw-r--r-- | linux-user/arm/cpu_loop.c | 3 | ||||
| -rw-r--r-- | linux-user/arm/target_syscall.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index d911929bf6..26928fbbb2 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -347,6 +347,9 @@ void cpu_loop(CPUARMState *env) case ARM_NR_breakpoint: env->regs[15] -= env->thumb ? 2 : 4; goto excp_debug; + case ARM_NR_get_tls: + env->regs[0] = cpu_get_tls(env); + break; default: gemu_log("qemu: Unsupported ARM syscall: 0x%x\n", n); diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscall.h index 94e2a42cb2..afc0772e19 100644 --- a/linux-user/arm/target_syscall.h +++ b/linux-user/arm/target_syscall.h @@ -16,6 +16,7 @@ struct target_pt_regs { #define ARM_NR_breakpoint (ARM_NR_BASE + 1) #define ARM_NR_cacheflush (ARM_NR_BASE + 2) #define ARM_NR_set_tls (ARM_NR_BASE + 5) +#define ARM_NR_get_tls (ARM_NR_BASE + 6) #define ARM_NR_semihosting 0x123456 #define ARM_NR_thumb_semihosting 0xAB |