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| author | Sai Pavan Boddu | 2020-02-24 10:39:23 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-28 17:14:57 +0100 |
| commit | b3df30ad2cf8f7e313a14d5073051cf59c06e9ed (patch) | |
| tree | 0e24df7bdc4ee74db4228db0a891dee702dc9621 /linux-user | |
| parent | arm_gic: Mask the un-supported priority bits (diff) | |
| download | qemu-b3df30ad2cf8f7e313a14d5073051cf59c06e9ed.tar.gz qemu-b3df30ad2cf8f7e313a14d5073051cf59c06e9ed.tar.xz qemu-b3df30ad2cf8f7e313a14d5073051cf59c06e9ed.zip | |
cpu/a9mpcore: Set number of GIC priority bits to 5
All A9 CPUs have a GIC with 5 bits of priority.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1582537164-764-3-git-send-email-sai.pavan.boddu@xilinx.com
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'linux-user')
0 files changed, 0 insertions, 0 deletions