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author | Jiaxun Yang | 2022-08-03 12:30:09 +0200 |
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committer | Laurent Vivier | 2022-09-27 13:19:05 +0200 |
commit | fbf47c18aa8687b1c6a929fbcd8bb36dfc386454 (patch) | |
tree | 20957cdd7bb1be51cd9a85c778db4cc3a087c370 /linux-user | |
parent | linux-user: Introduce stubs for ELF AT_BASE_PLATFORM (diff) | |
download | qemu-fbf47c18aa8687b1c6a929fbcd8bb36dfc386454.tar.gz qemu-fbf47c18aa8687b1c6a929fbcd8bb36dfc386454.tar.xz qemu-fbf47c18aa8687b1c6a929fbcd8bb36dfc386454.zip |
linux-user: Set ELF_BASE_PLATFORM for MIPS
Match most appropriate base platform string based on insn_flags.
Logic is aligned with aligned with set_isa() from
arch/mips/kernel/cpu-probe.c in Linux kernel.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220803103009.95972-3-jiaxun.yang@flygoat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user')
-rw-r--r-- | linux-user/elfload.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 581fbc858b..20894b633f 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1080,6 +1080,37 @@ static uint32_t get_elf_hwcap(void) #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2)) #endif +#define ELF_BASE_PLATFORM get_elf_base_platform() + +#define MATCH_PLATFORM_INSN(_flags, _base_platform) \ + do { if ((cpu->env.insn_flags & (_flags)) == _flags) \ + { return _base_platform; } } while (0) + +static const char *get_elf_base_platform(void) +{ + MIPSCPU *cpu = MIPS_CPU(thread_cpu); + + /* 64 bit ISAs goes first */ + MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6"); + MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5"); + MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2"); + MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64"); + MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5"); + MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4"); + MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3"); + + /* 32 bit ISAs */ + MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6"); + MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5"); + MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2"); + MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32"); + MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2"); + + /* Fallback */ + return "mips"; +} +#undef MATCH_PLATFORM_INSN + static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { |