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author | Peter Maydell | 2020-10-13 12:35:32 +0200 |
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committer | Peter Maydell | 2020-10-20 17:12:00 +0200 |
commit | 61db12d9f9eb36761edba4d9a414cd8dd34c512b (patch) | |
tree | 942f5a69b6dbba7847b679ea36c40798d5fb6abc /migration/multifd.c | |
parent | target/arm: Fix SMLAD incorrect setting of Q bit (diff) | |
download | qemu-61db12d9f9eb36761edba4d9a414cd8dd34c512b.tar.gz qemu-61db12d9f9eb36761edba4d9a414cd8dd34c512b.tar.xz qemu-61db12d9f9eb36761edba4d9a414cd8dd34c512b.zip |
target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest
For AArch32, unlike the VCVT of integer to float, which honours the
rounding mode specified by the FPSCR, VCVT of fixed-point to float is
always round-to-nearest. (AArch64 fixed-point-to-float conversions
always honour the FPCR rounding mode.)
Implement this by providing _round_to_nearest versions of the
relevant helpers which set the rounding mode temporarily when making
the call to the underlying softfloat function.
We only need to change the VFP VCVT instructions, because the
standard- FPSCR value used by the Neon VCVT is always set to
round-to-nearest, so we don't need to do the extra work of saving
and restoring the rounding mode.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201013103532.13391-1-peter.maydell@linaro.org
Diffstat (limited to 'migration/multifd.c')
0 files changed, 0 insertions, 0 deletions