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author | Richard Henderson | 2021-03-09 16:53:05 +0100 |
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committer | Peter Maydell | 2021-03-12 13:40:10 +0100 |
commit | c648c9b7e1ccff94b51ecbebe86a206952c47e75 (patch) | |
tree | fe4d3fce97e400c078fd42188453d25860d4e3ce /module-common.c | |
parent | target/arm: Update WHILE for PREDDESC (diff) | |
download | qemu-c648c9b7e1ccff94b51ecbebe86a206952c47e75.tar.gz qemu-c648c9b7e1ccff94b51ecbebe86a206952c47e75.tar.xz qemu-c648c9b7e1ccff94b51ecbebe86a206952c47e75.zip |
target/arm: Update sve reduction vs simd_desc
With the reduction operations, we intentionally increase maxsz to
the next power of 2, so as to fill out the reduction tree correctly.
Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small
vectors, so this triggers an assertion for vector sizes > 32 that are
not themselves a power of 2.
Pass the power-of-two value in the simd_data field instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210309155305.11301-9-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'module-common.c')
0 files changed, 0 insertions, 0 deletions