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authorRémi Denis-Courmont2021-01-12 11:45:00 +0100
committerPeter Maydell2021-01-19 15:38:51 +0100
commitb6ad6062f1e55bd5b9407ce89e55e3a08b83827c (patch)
treed15eeb1e9e455c1cf82c80cde7e62267237b5a9a /net/tap-bsd.c
parenttarget/arm: add 64-bit S-EL2 to EL exception table (diff)
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target/arm: add MMU stage 1 for Secure EL2
This adds the MMU indices for EL2 stage 1 in secure state. To keep code contained, which is largelly identical between secure and non-secure modes, the MMU indices are reassigned. The new assignments provide a systematic pattern with a non-secure bit. Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210112104511.36576-8-remi.denis.courmont@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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