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| author | Hao Wu | 2022-04-11 18:58:41 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-04-21 12:37:05 +0200 |
| commit | c3e9e73a8323cc61386c3067715ba4e44ea95a0f (patch) | |
| tree | 9543fa58e13c2b2a306c0520d87f015a89ed9154 /python/qemu/utils/qom_common.py | |
| parent | hw/arm/virt: impact of gic-version on max CPUs (diff) | |
| download | qemu-c3e9e73a8323cc61386c3067715ba4e44ea95a0f.tar.gz qemu-c3e9e73a8323cc61386c3067715ba4e44ea95a0f.tar.xz qemu-c3e9e73a8323cc61386c3067715ba4e44ea95a0f.zip | |
hw/misc: Add PWRON STRAP bit fields in GCR module
Similar to the Aspeed code in include/misc/aspeed_scu.h, we define
the PWRON STRAP fields in their corresponding module for NPCM7XX.
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Message-id: 20220411165842.3912945-2-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'python/qemu/utils/qom_common.py')
0 files changed, 0 insertions, 0 deletions